SpecAlign: A Semantic Alignment Framework for SystemVerilog Assertion Generation 事件

SpecAlign: A Semantic Alignment Framework for SystemVerilog Assertion Generation arXiv:2605.25181v1 Announce Type: new Abstract: Existing Large Language Model (LLM) approaches to SystemVerilog Assertion (SVA) generation primarily focus on syntactic validity and formal verification outcomes, while semantic alignment between generated assertions and natural language specifications remains difficult to quantify. As a result, hallucinated or misaligned SVAs can reduce confidence and increase debugg