Binary adder architectures for cell-based VLSI and their synthesis 论文

1997ETH Zürich Research Collection引用 269
DOI
Low-power high-performance VLSI designVLSI and Analog Circuit TestingQuantum-Dot Cellular Automata
Low-power high-performance VLSI designVLSI and Analog Circuit TestingQuantum-Dot Cellular Automata
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Binary adder architectures for cell-based VLSI and their synthesis · 作者

R

R. Zimmermann