A case study of ir-drop in structured at-speed testing 论文
2004引用 403
VLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisVLSI and FPGA Design Techniques
摘要
At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful application of structural atspeed tests. In this paper we characterize these problems on commercial ASICs in order to understand how to implement more effective solutions. 1