Linear-programming-based techniques for synthesis of network-on-chip architectures 论文

2006IEEE Transactions on Very Large Scale Integration (VLSI) Systems引用 257
DOI
Interconnection Networks and SystemsVLSI and FPGA Design TechniquesVLSI and Analog Circuit Testing
VLSI and FPGA Design TechniquesVLSI and Analog Circuit TestingInterconnection Networks and Systems
相关技术:Interconnection Networks and Systems
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Linear-programming-based techniques for synthesis of network-on-chip architectures · 作者

K

K Srinivasan

G

Goran Konjevod

K

Karam S. Chatha