Cascode voltage switch logic: A differential CMOS logic family 论文
1984引用 482
VLSI and FPGA Design TechniquesLow-power high-performance VLSI designVLSI and Analog Circuit Testing
摘要
A differential CMOS Logic family that is well suited to automated logic minimization and placement and routing techniques, yet has comparable performance to conventional CMOS, will be described. A CMOS circuit using 10,880 NMOS differential pairs has been developed using this approach.