A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling 论文

2010IEEE Journal of Solid-State Circuits引用 390
DOI
Interconnection Networks and SystemsParallel Computing and Optimization TechniquesEmbedded Systems Design Techniques
Parallel Computing and Optimization TechniquesEmbedded Systems Design TechniquesInterconnection Networks and Systems
相关技术:Parallel Computing and Optimization TechniquesInterconnection Networks and Systems
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A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling · 相关文章

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