TILE64 - Processor: A 64-Core SoC with Mesh Interconnect 论文

2008引用 641
Interconnection Networks and SystemsParallel Computing and Optimization TechniquesEmbedded Systems Design Techniques

摘要

The TILE64 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TM</sup> processor is a multicore SoC targeting the high-performance demands of a wide range of embedded applications across networking and digital multimedia applications. A figure shows a block diagram with 64 tile processors arranged in an 8x8 array. These tiles connect through a scalable 2D mesh network with high-speed I/Os on the periphery. Each general-purpose processor is identical and capable of running SMP Linux.