Graph-Based Algorithms for Boolean Function Manipulation 论文

1986IEEE Transactions on Computers引用 8906
Low-power high-performance VLSI designFormal Methods in VerificationVLSI and Analog Circuit Testing

详细信息

发表期刊/会议
IEEE Transactions on Computers
发表日期
1986-08-01
发表年份
1986

关键词

Low-power high-performance VLSI designFormal Methods in VerificationVLSI and Analog Circuit Testing

摘要

In this paper we present a new data structure for representing Boolean functions and an associated set of manipulation algorithms. Functions are represented by directed, acyclic graphs in a manner similar to the representations introduced by Lee [1] and Akers [2], but with further restrictions on the ordering of decision variables in the graph. Although a function requires, in the worst case, a graph of size exponential in the number of arguments, many of the functions encountered in typical applications have a more reasonable representation. Our algorithms have time complexity proportional to the sizes of the graphs being operated on, and hence are quite efficient as long as the graphs do not grow too large. We present experimental results from applying these algorithms to problems in logic design verification that demonstrate the practicality of our approach.

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