PipeRench: a reconfigurable architecture and compiler 论文

2000Computer引用 462
Embedded Systems Design TechniquesParallel Computing and Optimization TechniquesInterconnection Networks and Systems

详细信息

发表期刊/会议
Computer
发表日期
2000-04-01
发表年份
2000

关键词

Embedded Systems Design TechniquesParallel Computing and Optimization TechniquesInterconnection Networks and Systems

摘要

With the proliferation of highly specialized embedded computer systems has come a diversification of workloads for computing devices. General-purpose processors are struggling to efficiently meet these applications' disparate needs, and custom hardware is rarely feasible. According to the authors, reconfigurable computing, which combines the flexibility of general-purpose processors with the efficiency of custom hardware, can provide the alternative. PipeRench and its associated compiler comprise the authors' new architecture for reconfigurable computing. Combined with a traditional digital signal processor, microcontroller or general-purpose processor, PipeRench can support a system's various computing needs without requiring custom hardware. The authors describe the PipeRench architecture and how it solves some of the pre-existing problems with FPGA architectures, such as logic granularity, configuration time, forward compatibility, hard constraints and compilation time.