Razor: a low-power pipeline based on circuit-level timing speculation 论文

2004引用 841
DOI
Parallel Computing and Optimization TechniquesLow-power high-performance VLSI designRadiation Effects in Electronics
Parallel Computing and Optimization TechniquesLow-power high-performance VLSI designRadiation Effects in Electronics
相关技术:Parallel Computing and Optimization Techniques
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Razor: a low-power pipeline based on circuit-level timing speculation · 作者

T

Trevor Mudge

K

Krisztián Flautner

T

Todd Austin

D

David Blaauw

C

Conrad H. Ziesler

T

Toan Thang Pham

R

Rajeev R. Rao

S

Sanjay Pant

S

Shidhartha Das

N

Nam Sung Kim

D

Dan Ernst