Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling 论文

2004引用 369
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Parallel Computing and Optimization TechniquesLow-power high-performance VLSI designEmbedded Systems Design Techniques
Parallel Computing and Optimization TechniquesEmbedded Systems Design TechniquesLow-power high-performance VLSI design
相关技术:Parallel Computing and Optimization Techniques
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