Using march tests to test SRAMs 论文
1993IEEE Design & Test of Computers引用 270
VLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisLow-power high-performance VLSI design
摘要
A unified notation is presented for static random access memory (SRAM) fault models and fault tests for these models. The likelihood that the different types of faults will occur is demonstrated using inductive fault analysis and physical defect analysis. A set of march tests is discussed, together with methods to make composite tests for collections of fault tapes. Empirical results showing the fault coverage of the different test enable SRAM users to choose the fault models of interest as well as the test.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>