System-on-a-chip test-data compression and decompression architectures based on Golomb codes 论文

2001IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems引用 365
DOI
VLSI and Analog Circuit TestingVLSI and FPGA Design TechniquesInterconnection Networks and Systems
VLSI and FPGA Design TechniquesVLSI and Analog Circuit TestingInterconnection Networks and Systems
相关技术:Interconnection Networks and Systems
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System-on-a-chip test-data compression and decompression architectures based on Golomb codes · 作者

K

Krishnendu Chakrabarty

A

Anshuman Chandra