First-order incremental block-based statistical timing analysis 论文

2004引用 660
DOI
Low-power high-performance VLSI designVLSI and FPGA Design TechniquesVLSI and Analog Circuit Testing
VLSI and FPGA Design TechniquesLow-power high-performance VLSI designVLSI and Analog Circuit Testing
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First-order incremental block-based statistical timing analysis · 相关技术

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