A graph placement methodology for fast chip design 论文

2021Nature引用 566
DOI
VLSI and FPGA Design TechniquesLow-power high-performance VLSI designEmbedded Systems Design Techniques
VLSI and FPGA Design TechniquesEmbedded Systems Design TechniquesLow-power high-performance VLSI design
关系图谱

A graph placement methodology for fast chip design · 作者

J

Jeff Dean

A

Anna Goldie

R

R. H. S. Carpenter

R

Richard C. Ho

J

James Laudon

Q

Quoc V. Le

E

E. Tuncer

W

William Hang

K

Kavya Srinivasa

A

Andy Tong

J

Jiwoo Pak

A

Azade Nova

O

Omkar Pathak

E

Eric N. Johnson

Y

Young‐Joon Lee

S

Shen Wang

E

Ebrahim M. Songhori

J

Joe Wenjie Jiang

M

Mustafa Ege Yazgan

A

Azalia Mirhoseini