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Michael Riepen · 相关论文

A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS
2010引用 598
A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling
2010IEEE Journal of Solid-State Circuits引用 390
The 48-core SCC Processor: the Programmer's View
2010引用 229