A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor 论文

2007引用 238
DOI
Semiconductor materials and devicesVLSI and Analog Circuit TestingAdvancements in PLL and VCO Technologies
VLSI and Analog Circuit TestingAdvancements in PLL and VCO TechnologiesSemiconductor materials and devices
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A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor · 作者

V

Vikas Pokala

M

Michael S. Floyd

N

N. James

T

Tuyet Nguyen

S

Soraya Ghiasi

G

Gary D. Carpenter

H

H.S. Deogun

R

Robert M. Senger

A

Alan J. Drake