Test data compression and test resource partitioning for system-on-a-chip using frequency-directed run-length (FDR) codes 论文

2003IEEE Transactions on Computers引用 229
VLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisVLSI and FPGA Design Techniques

摘要

Test data compression and test resource partitioning (TRP) are necessary to reduce the volume of test data for system-on-a-chip designs. We present a new class of variable-to-variable-length compression codes that are designed using distributions of the runs of 0s in typical test sequences. We refer to these as frequency-directed run-length (FDR) codes. We present experimental results for ISCAS 89 benchmark circuits and two IBM production circuits to show that FDR codes are extremely effective for test data compression and TRP. We derive upper and lower bounds on the compression expected for some generic parameters of the test sequences. These bounds are especially tight when the number of runs is small, thereby showing that FDR codes are robust, i.e., they are insensitive to variations in the input data stream. In order to highlight the inherent superiority of FDR codes, we present a probabilistic analysis of data compression for a memoryless data source. Finally, we derive entropy bounds for the benchmark test sets and show that the compression obtained using FDR codes is close to the entropy bounds.

相关技术

暂无数据

相关事件

暂无数据

相关文章

暂无数据